| ID | Label | Type | #Val | Min | Max | Attr | Description |
|---|---|---|---|---|---|---|---|
|
12650 |
Raw commutation position from FPGA, mcnt |
Flt32 |
|
|
|
RO |
Commutation position read directly from the FPGA in units of mcnts. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12651 |
Commutation position, mcnt |
Flt32 |
|
|
|
RO |
Commutation position converted from the FPGA raw reading in mcnts. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12653 |
Commutation (electrical) angle, degree |
Flt32 |
|
|
|
RO |
Current commutation angle in degrees. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12654 |
Step number (0-5) for 6-step commutation |
Int32 |
|
|
|
RO |
(Not supported) The step number for a 6-step trapezoidal commutation. |
|
12655 |
Current feedback of phase 1, ccnt |
Flt32 |
|
|
|
RO |
Current feedback of motor phase 1 in units of ccnt. The current feedback value is already adjusted by the phase 1 current offset. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12656 |
Current feedback of phase 2, ccnt |
Flt32 |
|
|
|
RO |
Current feedback of motor phase 2 in units of ccnt. The current feedback value is already adjusted by the ADC sensor gain and the phase 2 current offset. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12657 |
Current feedback of phase 3, ccnt |
Flt32 |
|
|
|
RO |
Derived current feedback of motor phase 3, based on phase 1 and 2 feedback values in units of ccnt. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12658 |
Id current feedback, ccnt |
Int16 |
|
|
|
RO |
The Vector Control algorithm that performs the motor current loop
control, converts the 3 phases of the current feedback (DataID's 12655,
12656, 12657) into two perpendicular current values, Iq and Id in the
so called Q and D space. For
a motor with permanent magnets, such as a BLDC motor, Iq corresponds
to the torque being applied to the motor and Id is zero. For
an induction motor, Id generates the motor magnetization (flux) and
Iq generates the motor torque (armature current). These feedback
values are in units of ccnt. |
|
12659 |
Iq current feedback, ccnt |
Int16 |
|
|
|
RO |
|
|
12660 |
Id current tracking error, ccnt |
Int16 |
|
|
|
RO |
Difference between the Id and Iq commands (DataID's 12663 and 12664) and the actual Id and Iq generated (DataID's 12658 and 12659) in units of ccnt. ["Enable amplifier data logging" (DataID 10603) must be turned on to read this value.] |
|
12661 |
Iq current tracking error, ccnt |
Int16 |
|
|
|
RO |
|
|
12662 |
Current command converted from torque, ccnt |
Flt32 |
|
|
|
RO |
Current command derived from the input torque command in units of ccnt. |
|
12663 |
Id current command, ccnt |
Flt32 |
|
|
|
RO |
The Id and Iq commands computed from the input current command in units of ccnt. These two values are used by the vector control for motor commutation. See "Id current feedback" (DataID 12658) and "Iq current feedback" (DataID 12659) for a further explanation. |
|
12664 |
Iq current command, ccnt |
Flt32 |
|
|
|
RO |
|
|
12665 |
Filtered DC bus voltage, volt |
Flt32 |
|
|
|
RO |
DC bus voltage reading in volts. Depending on the motion, the bus voltage varies during acceleration and deceleration. The vector control algorithm makes use of the DC bus voltage reading to dynamically derive a current loop gain. This in turn affects the PWM duty cycle and maintains the specified phase currents into the motor windings. |
|
12666 |
Available voltage D, volt |
Flt32 |
|
|
|
RO |
These values indicate the voltage available for use by the Q and D phases. These voltages are calculated based on the DC bus voltage and are in units of volts. |
|
12667 |
Available voltage Q, volt |
Flt32 |
|
|
|
RO |
|
|
12668 |
Voltage to PWM duty cycle scale factor, pcnt/volt |
Flt32 |
|
|
|
RO |
Conversion factor from a voltage command (output of the current loop PI compensator) to the final PWM count in units of pcnt/volt. Note that this conversion factor is derived internally and varies based on the DC bus voltage. |
|
12669 |
U/f control position increment, mcnt |
Int32 |
|
|
|
RO |
Output of the U/f control. The U/f control causes the motor to spin
based solely on the input voltage and rotation speed.
The motor is run synchronously, i.e., similar to a stepper motor. DataID
12669 is in units of mcnt. DataId's 12670 and 12671 are the D and Q phase voltage output commands and are in units of volts. |
|
12670 |
U/f control Usd command, volt |
Flt32 |
|
|
|
RO |
|
|
12671 |
U/f control Usq command, volt |
Flt32 |
|
|
|
RO |
|
|
12672 |
Usd reference voltage, volt |
Flt32 |
|
|
|
RO |
These are the total D/Q output voltage commands that are converted to PWM signals. |
|
12673 |
Usq reference voltage, volt |
Flt32 |
|
|
|
RO |
|
|
12674 |
PWM duty cycle phase 1, pcnt |
Int16 |
|
|
|
RO |
The final converted PWM commands in units of pcnts. The PWM duty cycles are converted to unsigned values with center point located roughly at 1/2 of total PWM count range (DataID 10688). Also, a PWM center-tap adjustment is implemented to "float" the PWM values based on the AC input line rectification result. (Only available with special diagnostic software. In addition, "Enable amplifier data logging" (DataID 10603) must be turned on to read this value.) |
|
12675 |
PWM duty cycle phase 2, pcnt |
Int16 |
|
|
|
RO |
|
|
12676 |
PWM duty cycle phase 3, pcnt |
Int16 |
|
|
|
RO |
|
|
12677 |
Usd voltage feedforward, volt |
Flt32 |
|
|
|
RO |
These are the D/Q voltage feedforward terms that are computed by the current control loop. At present, the voltage feedforward is only a function of the Motor Back-EMF constant (DataID 10658) and the speed of the motor. The voltage feedforward is added to the values computed by current loop compensator in order to determine the Usd and Usq reference voltages (DataID's 12672, 12673). |
|
12678 |
Usq voltage feedforward, volt |
Flt32 |
|
|
|
RO |
|
|
12679 |
Usd voltage of current loop compensator, volt |
Flt32 |
|
|
|
RO |
These are the D and Q voltages that are computed by the current loop compensator during the standard closed loop current control mode. These values are added to the Usd/Usq feedforward voltages (DataID's 12677, 12678) to form the Usd/Usq reference voltages (DataID's 12672, 12673). The reference voltages are converted to the PWM signals that are intended to generate the commanded Id/Iq currents (DataID's 12663, 12664). |
|
12680 |
Usq voltage of current loop compensator, volt |
Flt32 |
|
|
|
RO |
|
|
12681 |
Amplifier RMS current, A(rms) |
Flt32 |
|
|
|
RO |
This is the root-mean-square (RMS) current that is computed for each motor amplifier. This "average" value is used to test if the motor or the amplifier is exceeding its RMS limit. See 10611. |
|
12682 |
Available voltage scale factor [0,1] |
Flt32 |
|
|
|
RO |
If the combination of the Usd and Usq reference voltages (DataID's 12672, 12673) demand more voltage than is available from the DC bus, the reference voltages are reduced by multiplying them times the "Available voltage scale factor" (DataID 12682). This factor is automatically computed to ensure that the combined voltage command does not exceed the available bus voltage. This factor can range from 0 to 1 and is normally equal to 1. |
|
12683 |
Nominal DC Bus voltage, volt |
Flt32 |
|
|
|
RO |
The first time that motor power is enabled, the servos monitor the DC motor bus voltage and compute the nominal voltage. This voltage is tested to ensure that the bus rises above a minimum of 10VDC. In addition, the nominal voltage is subsequently utilized by the FPGA to detect if the motor bus droops an excessive amount. If the instantaneous DC bus voltage falls approximately 30% below the nominal, an under-voltage error is signaled. |
|
12684 |
Raw DC bus voltage, volt |
Flt32 |
|
|
|
RO |
This parameter returns the instantaneous DC motor bus voltage as read from an ADC. |
|
12688 |
Commutation phase advance angle, mcnt |
Flt32 |
|
|
|
RO |
Displays the current phase advance angle set in the Fpga. |